Compare SAR, flash, and sigma-delta ADC architectures in terms of speed, resolution, and typical use.

• A. SAR: moderate speed/resolution, power-efficient; Flash: very fast, high power, lower resolution per diode; Sigma-Delta: high resolution, lower speed, oversampling.
• B. SAR: fastest; Flash: highest resolution; Sigma-Delta: lowest power.
• C. SAR: low speed; Flash: high power; Sigma-Delta: high speed.
• D. All have identical performance.

Answer: (A)

Trade-offs between speed, resolution, and power drive which ADC architecture fits a given use. A SAR (successive approximation register) converts bits with a binary-search approach; the number of comparison cycles grows with the bit count, so speed is moderate and power consumption stays fairly low, making it a versatile, power-efficient choice for microcontrollers and mixed-signal front-ends. Flash ADCs use a complete ladder of comparators in parallel, so a conversion can happen in one shot and at very high speed; however, the number of comparators grows exponentially with resolution, which drives up power, area, and cost, so these are typically high-speed but power-hungry with practical resolutions limited by circuitry. Sigma-delta ADCs oversample and shape quantization noise, then filter digitally to achieve very high effective resolution, but at the cost of slower conversion rates because the oversampling and decimation filter determine the throughput. This combination explains why each description fits: moderate speed and power efficiency for SAR, very fast but high power for flash, and high resolution with lower speed for sigma-delta.