In an edge-triggered flip-flop, when is the input data sampled to determine the next state?

• A. It samples data on every change of the input data level.
• B. It samples data with the clock held high.
• C. It samples data on the clock transition.
• D. It samples data only at power-up.

Answer: (C)

Edge-triggered flip-flops capture the input exactly at the moment of the clock edge. The internal storage is protected from changes while the clock level is stable, so the data isn’t sampled while the clock is high or low. When the clock transitions (rising or falling, depending on the device), a brief window opens and the current input value is captured to become the next state. After the edge, further changes to the input don’t affect the stored value until the next clock edge. This is what keeps timing predictable and ensures synchronous operation.

The other scenarios don’t fit: sampling on every input level change would make the device sensitive to glitches; sampling while the clock is held high would cause continuous sampling rather than a discrete moment; sampling only at power-up wouldn’t respond to subsequent input changes.