Why must source impedance be limited for an ADC input sampling capacitor network to give accurate conversion?

• A. Source impedance has no impact due to the sample-and-hold architecture.
• B. Only the input reference matters; source impedance is irrelevant.
• C. If source impedance is too high, the sampling capacitor cannot charge to the input within the sampling window, causing conversion errors.
• D. A very high source impedance improves sampling accuracy.

Answer: (C)

When an ADC samples a signal, the input sampling capacitor must be charged to the current input voltage through the source impedance. That charging follows an RC process with a time constant equal to the source impedance times the sampling capacitor. If the source impedance is too high, the capacitor cannot reach the input voltage within the available sampling window, so the capacitor voltage ends up lower than Vin. Since the conversion uses that capacitor voltage, any incomplete charging translates directly into a measurement error. To keep the conversion accurate, the source impedance must be low enough that the sampling capacitor settles to the input voltage within the specified sampling time (leaving only a small, acceptable error). The other ideas miss this dynamic: the sampling process does depend on how quickly the capacitor can be charged, not just the reference; a very high impedance does not improve accuracy and can actually degrade it.